1. Field of the Invention
The present invention relates to a phase-locked loop circuit, and particularly to a phase-locked loop circuit capable of outputting a lock detection signal when the locking of phase is entirely accomplished using the operating properties of the phase-locked loop circuit.
2. Description of the Related Art
Phase-locked loop (PLL) circuits have been one of the basic building blocks in modern electronic systems. They have been widely used in communications, multimedia, and other applications. Frequency synthesizers, FM demodulators, clock recovery circuits, modems, and tone decoders are some applications for PLL circuits.
The PLL circuit is a negative feedback control system. As shown in FIG. 1, the PLL circuit generally comprises a phase-frequency detector (PFD) 100, a charge pump 200, a loop filter 300, a voltage-controlled oscillator (VCO) 400, and a frequency divider 500. The PFD 100 generates an up signal SUP and/or a down signal SDN based on the phase (and frequency) difference between a reference signal SIN and a feedback signal SFEED. The charge pump 200 generates output signals whose levels are different from each other according to the state of the up signal SUP and/or the down signal SDN. The output signal of the charge pump 200 is provided to an input of the VCO 400 after the high frequency component thereof is filtered in the loop filter 300. The VCO 400 generates high frequency signals that have different frequencies according to the DC level of the input voltage VCOI. The frequency divider 500 generates the low frequency feedback signal SFEED based on the high frequency VCO output signal. The feedback signal SFEED is applied as an input to the PFD 100. When the PLL circuit is in the lock mode, the phase of the reference signal SIN and the phase of the feedback signal SFEED are locked. In contrast, when the PLL circuit is not in the lock mode, the phase of the reference signal SIN and the phase of the feedback signal SFEED are not locked.
In such the PLL circuit, the output of VCO can be used in various applications described above when the PLL circuit is locked. Accordingly, there is a need for a lock detecting circuit capable of determining whether the PLL circuit is operating in the lock mode or in the unlock mode. One example of such a lock detecting circuit is disclosed in Japanese Patent Application Laid open No. 2002-344312. But, in such a conventional lock detecting circuit, there are problems that lock detection cannot be accurately performed due to noise and that a lock detection signal can be generated when the PLL circuit is not in an entire lock state.
Accordingly, because the lock detecting function is essential in the PLL circuit, there is a need for the PLL circuit of which the lock detection operation can be stably and accurately performed.